1. Field
The present disclosure relates generally to digital systems, and more specifically, to a two channel bus structure capable of supporting address information, data and transfer qualifiers.
2. Background
Computers have revolutionized the electronics industry by enabling sophisticated processing tasks to be performed with just a few strokes of a keypad These sophisticated tasks involve an incredibly high number of complex components that communicate with one another in a fast and efficient manner using a bus. A bus is a channel or path between components in a computer.
A typical computer includes a microprocessor with system memory. A high bandwidth system bus may be used to support communications between the two. In addition, there may also be a lower performance peripheral bus which is used to transfer data to lower bandwidth peripherals. In some cases, there may also be a configuration bus which is used for the purpose of programming various resources. Bridges may be used to efficiently transfer data between the higher and lower bandwidth buses, as well as provide the necessary protocol translation.
Many buses resident in a computer have traditionally been implemented as shared buses. A shared bus provides a means for any number of components to communicate over a common path or channel. In recent years, shared bus technology has been replaced to a large extent by point-to-point switched connections. Point-to-point switched connections provide a direct connection between two components on the bus while they are communicating with each other. Multiple direct links may be used to allow several components to communicate at the same time.
Conventional bus designs include independent and separate read, write and address channels. A microprocessor, for example, can read or write to system memory by placing an address location on the address channel and sending the appropriate read/write control signal. When the microprocessor writes data to system memory, it sends the data over the write channel. When the microprocessor reads data from system memory, it receives the data over the read channel.
Although this particular bus structure provides a fairly standardized way to communicate between components of a computer, it requires a number of dedicated channels. These channels require driver, receiver and buffer circuits, all of which consume power. In integrated circuit applications, these channels occupy valuable chip area. Accordingly, there is a need in the art for a simplified bus structure.